1.Test-chip design and tape-out system developing
2.Process flow developing
3.New devices developing
4.Collaborate with related teams for Design Collaterals (DRM / DRC / LVS / SPICE / PDK) developing
5.Work location : Hsinchu or Tainan
1.Major in EE or Physics MS or Ph.D
2.Experienced in process integration or HV / BCD devices developing and characterization.
3.Innovative character in problems solving.
4.Familiar with TCAD simulation is a bonus
5.Process integration & CMOS characterization