US ASIC Design Leader
Michael Page

About Our Client

US IOT and Ethernet branding company, dedicated in new innovative product.

Job Description

  • Lead the architectural definition of each design, defining the system data flow, connectivity and performance required to deliver innovative solutions for wireless communication system.
  • This position will require substantial cross-functional interaction with algorithm, software, and systems.
  • Integrate / design elements of the SOC processing fabric including CPU, high speed interfaces, memory interconnect, top level clock and reset structures etc.
  • Work with design, verification, implementation and validation engineering to develop project execution plan and schedule management.
  • Communicate with internal teams and provide suitable test architecture planning for production and verification.
  • Assist DFT structure implementation.
  • Working with test engineers to bring up test vectors on test-house / silicon
  • The Successful Applicant

  • MS degree in EE / CE / CS.
  • At least 8 years digital IC / SoC design experience.
  • Proficient in Design Specification writing & RTL design and plus Familiar with Verilog, FPGA design technology.
  • Experienced in TOP level integration for at least two projects.
  • Familiar with DFT flow (DFT Compiler / Fastscan etc).
  • Skilled in performing system and implementation architecture analysis and advising high performance solutions.
  • Effective written and oral communication skills
  • What's on Offer

    Attractive salary package.

    Career progression with global scope and project.

    Contact : Ian LiuQuote job ref : 4037094+886 2 8729 8261 US ASIC Design Leader From email

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