ASIC Performance Architect
Taipei, Taiwan

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves.

Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure.

You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing.

Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

As a member of the ASIC Architecture team, you will collaborate with hardware designers and architects to ensure ASIC performance and power meet design and product requirements.

Your key responsibilities will be developing and building new pre-Silicon tools, running experiments, and analyzing results.

As part of this work, you will participate in the development of technology in compute, media, fabric, memory, etc., and contribute to designs.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences.

We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.


  • Perform pre-silicon performance validation and simulation using C / C++ and RTL-based models.
  • Perform analysis results in both qualitative and quantitative fashion effectively.
  • Create tools / scripts to automate test suites and models to improve functionality of simulators.
  • Participate in evaluation of future ASIC designs and general architecture.
  • Minimum qualifications :

  • Bachelor's degree in Engineering field or equivalent practical experience.
  • Experience with C or C++.
  • Experience in ASIC architecture or graduate coursework in computer architecture.
  • Experience with performance analysis, tools, or simulators at different abstraction levels (Cycle Accurate, TLM, and / or Functional).
  • Preferred qualifications :

  • Master's degree or PhD in Computer Science, Electrical Engineering or related field with 3 years of related working experience.
  • Experience designing / implementing or validating RTL for CPU, GPU, Fabric, Memory, Caches, Camera, Video, Display.
  • Proficient in a scripting language. Experience designing C / C++ / System C models.
  • Detailed knowledge of software / hardware system flows for device use cases.
  • Domain knowledge in one or more of these areas : CPU, GPU, Fabric, Memory, Camera, Video, Display, Security, or Modeling and analysis of chip / workload power.
  • Knowledge of OS, Firmware, software stack.
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