Senior Analog Mixed Signal Verification Engineer
NXP Semiconductors

The candidate would be responsible for :

  • Define the AMS Verification Strategy for PMIC products including charger, power switches, buck converters and etc.
  • Implement chip-level mixed signal simulation environments (testbenches, run scripts, etc...).
  • Create AMS Verification plan by mapping all the functional requirements
  • Develop self-checking simulations and models coming up with Effort Estimates and detailed Schedule
  • Coordinate the verification tasks, Track schedules and ensure deadlines meet reporting progress and communication with cross functional teams
  • Profile :

  • Masters / Bachelors in Electronics Engineering
  • The candidate should have at least 3 years of experience in AMS verification
  • This person possesses analog circuits and modeling of analog blocks
  • Must be knowledgeable in both analog and digital design fundamentals.
  • Good communication skills (written and verbal)
  • Proactive and detail-oriented
  • Expertise in following tools and standards :

  • Cadence AMS designer (both ADE-XL / Maestro and command-line)
  • Hierarchy Editor configuration and verilog configurations
  • Custom connect modules and connect rules and / or IE cards
  • Spice / Spectre / APS / XPS simulator : able to solve slowness, convergence issues.
  • Real-Number Modeling : wreal, SV, User-defined Types / Nets (EE package)
  • Would be a plus :

  • Systemverilog Assertions
  • UVM-MS concepts. Ideally able to setup a UVM-MS environment
  • Some knowledge of C / DPI / VPI
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