Mediatek Analog Design and Circuit Technology (ADCT) is currently seeking experienced analog circuit designers to develop high speed, high performance and low power analog / mixed-signal circuits and PMU for wireless cellular phones, wireless LANs, smart home, wide-area networks, high performance computing, AI, IoT, automotive and ASIC.
This role will include circuit analysis, design, simulation and test using innovative architectures to deliver best-in-class performance.
Of particular importance will be design experience of involving at least one or more topics in the following :
1.High speed SerDes circuit design, like CTLE, CDR, DFE, PLL, DLL and TX Driver.
2.High efficient power management integrated circuit (PMIC) design, like LDO, DC-DC converter and envelop tracking (ET) power supply modulator.
3.High speed data converters, like SAR ADC, pipelined ADC, interleaved ADC, hybrid ADC, current steering DAC and switch-capacitor DAC's.
4.High speed DDR / LPDDR analog PHY circuit design and verification.
5.High resolution data converter, like noise shaping CT / DT DSM ADC / DAC and incremental ADC.
6.Ethernet, Bio-medical and Sensor Analog Front Ends.
7.Audio Class-AB / D amplifiers, PGA, filter, oscillators and temperature sensor.
8.Ultra-low power analog / mixed-signal circuits design for IoT.
9.Analog circuit and chip integration of Serdes, PLL, Data Converter, PMU and PMIC.
10. Work Location : HsinChu / Taipei / ChuPei / Tainan
Requirement 1.Master or Doctorate degree in Electrical Engineering or related field.
2.Hands on in analog / mixed-signal transistor-level circuit designs, run simulations and verify designs using Cadense tools.
3.Manage and guide layout floor plan block and top level, give concise guidelines to layout engineers.
4.Develop the analog testing plans and work with TE teams.
5.Provide PKG and PCB layout guideline
6.Design review documentation of delivered IP and project.
7.Good understanding of device physics and the impacts of layout effects.
8.Able to independently solve difficult design challenges, validate simulation-versus-silicon and debug silicon issues.
9.Be responsible of behavioral modeling (Verilog / Verilog-A / Verilog-AMS) of circuit blocks and sub-systems.
10.Communicate with cross functional teams on designing specs, benchmarking IP, and integration.
11.Understanding of semiconductor device characteristics for high speed, low noise, low power operation and high reliability.