Responsible for the performance of FT hardware(socket / KIT / Docking) design and management.
Handle the improvement project on the test yield & the jamming rate & the quality risk.
Reporting and management in the responsibility area.
Requirements :
2-5 years experience in related field. (Wafer test / Final test)
Major in mechanical engineering / electrical engineering in college or above.
Proficient in English.
Attitude / Behavior : engagement and well patience during communication.
Well versed in the office software(powerpoint / word / execl).
Well versed in the inventor / autoCAD software for the hardware design.
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