RISC-V is a groundbreaking CPU instruction set and architecture. Along with being an open-source instruction set, RISC-V is informed by decades of industry experience with various RISC processor designs, while being unencumbered with the necessity of backward compatibility.
It is a unique opportunity to base a processor design on sound engineering principles, and the successful applicant will have comprehensive daily hands-on exposure to this architecture.
While several companies are pursuing RISC-V design, only SiFive is founded and actively managed by the inventors of RISC-V.
This is not an academic exercise; we have real customers and real silicon.As a Verification Engineer on the Design Verification team, you will participate in the definition, implementation, and execution of our verification strategy, as well as being a key participant in the analysis of our verification quality of results.
This verification position is a highly visible role, the simple purpose of which is to ensure the silicon works. What will you work on when you join our team?
By its design philosophy, RISC-V is highly configurable, and we have several different configurations in our design pipeline, with various combinations of supported instruction set and with various peripherals and bus interconnect architectures.
Implementing design verification methodologies that can accommodate such variation is a challenging task, to be addressed in this role.
SiFive is proud to be an equal employment opportunity workplace. We offer a competitive compensation package that includes flexible paid time off, health benefits, employee stock option program, and much more.
If you yearn to be challenged and wish to work in an environment where the boundaries of your creativity and skills will be tested, then SiFive is the place for you.