IC Design Methodology Engineer
HsinChu, Taiwan

Job Description

Constraint flow designer with the vendor, CAD teams & IC design teams in the development of timing constraint (SDC) & netlist data-in automation.

  • Develop & maintain components and scripts required from internal design and CAD teams.
  • Support design teams on flow infrastructures, SDC / Netlist sanity and consistency verification, related tools, and flows.
  • New features research and development to improve design flow efficiency and quality.
  • Requirement . Master degree in Electrical engineering, Electronics Engineering, or Computer Science.

  • Familiar with of front-end design flow, SDC and STA.
  • Minimum of 2 years of cell-based IC design field of experience with the designing tool (Design Compiler, Primetime, or Conformal Constraint Designer)
  • Experience of handling designs with more than 20M instant count is plus.
  • Good knowledge of tcl, perl / python and UNIX shell environment.
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