Principal Application Engineer
Cadence Design Systems, Inc.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Position Description :

1. To provide key technical support in digital IC design implementation product demonstration, and sales presentations.

2. To demonstrate strong ability and to be hands-on in full APR flow including floorplan, placement, timing analysis, CTS, signoff timing closure methodology.

3. To support key customer engagements on the business increase.

4. Have real design tape-out experience especially for advanced node design.

5. To play a leading role among other team members, while receive little instruction on routine and general assignments.

Position Requirements :

  • Master with 3-5 years working experience or Bachelor with 7+ years’ experience in IC design. (Cadence Innovus experience will be a plus)
  • Understanding of full APR flow including timing, congestion analysis and low-power methodology. (Experience for Static Timing Analysis, including SI will be plus)
  • Good communication in English and Chinese, good confidence and good self-motivation.
  • Be familiar with shell / perl / tcl etc. script language.
  • We’re doing work that matters. Help us solve what others can’t.


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