The candidate will work with process and device R&D teams in Taiwan to develop memory test chips for process development and memory macros for product development.
Work with process R&D team to define and drive memory architecture, device spec and technology features of high density memory.
Lead the design team to implement memory test chip and macro for product developments.
Evaluate memory architecture option for diverse product requirements.
Must have M.S / Ph.D. degree in Electrical Engineering.
5+ years' experience in memory product or memory technology development, especially emerging memory development.
Strong experience in STT-MRAM test chip design and product development.
Good track records in delivering memory products and technology development.
Fluent in either Chinese or English.