1. Senior SI / PI engineer
2. Chip development with PDN / IR analysis
3. DDR interface design
4. High speed Serdes interface design
5. Customers technical support
Requirement 1. Experiences in signal integrity (SI) and power integrity (PI) design. with high speed PCB, or package or Connector.
2. Familiar with EM simulation tools, eg. Ansys tool and Cadence tool.
3. Experiences with high performance CPU / GPU / xPU power management and PDN / IR droop analysis.
4. Knowledge in DDRPHY and memory IOs and experiences in Serdes links.
5. Good communication skills and technical support for customers.
6. Hard working with efficiency and with passion.
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