R&D Engineer, Sr II
Synopsys, Inc
TAIWAN - Hsinchu

Job Description and Requirements

R&D Sr II NVM Design Engineer

Job Description

The ideal candidate will be a member of a next generation advanced NVM design team and have the opportunities to participate in IP generation.

The candidate must be a team player with good written and verbal communication skills, and is self-motivated, detail oriented, and able to work with cross-functional teams.


  • Contribute in all parts of advance memory development flow, starting at design spec.
  • Standard CMOS-based non-volatile memory circuit design
  • Design and modified charge pump, voltage regulator and sense amplifier in advance technologies (10nm, 7nm and 5nm)
  • Post layout extraction & simulation
  • Full chip level Simulation / Verification
  • Work with Product Engineer to perform silicon verification
  • Working with layout designers.
  • Skills and Experience Required

  • 5+ years of industry experience as a memory or non-volatile memory circuit designer
  • Experience with Testchip Tapeout
  • Strong fundamentals of transistor level CMOS circuit design
  • Familiar with circuit simulation tools (XA, HSIM, HSPICE, etc.) is required
  • Must have prior experience with Industry standard design and layout tool (Custom Complier and ICV is a plus)
  • Hands-on experience on sense-amplifier, voltage regulator, charge pump and bandgap reference design
  • Experience with statistical design methodology (generating and analyzing Monte-Carlo results)
  • Experience with chip level Simulation
  • Hands-on experience of Si debugging
  • Experience with FinFET design is a plus
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