The Platform Architecture, Integration, and Validation org located within Intel's Data Platform Group (DPG) is responsible for the validation and verification of DPG's next generation Xeon platforms.
Responsibilities include enabling and validating new platform technologies, including key interconnects such as Memory, PCI Express, and CXL Compute Express Link, etc.
We are looking for a capable Platform Validation and Debug Engineer with a thorough working knowledge of platform debug approaches to help us with our Xeon Platform validation efforts.
In this role, you will help deliver and ensure a quality end-to-end solution and a positive experience for our customers.
You will be responsible for the development, creation, and new test content execution of validation plans, as well as debug of issues that arise.
You will help setup and config systems in the lab to enable testing and hands-on debug.
You will work with both internal and external validation teams.
You will bring your understanding of debug and / or validation practices to help solve challenging platform issues, we are looking for someone that will be hands-on, is comfortable getting in the lab, and who is interested in using state of the art debug and test equipment to help discover and drive resolution to key issues.
If you enjoy solving technical problems and like challenging yourself with leading edge technology, we are interested in hearing from you.
You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Relevant experience can be obtained through schoolwork, classes, and project work, internships, military training, and / or work experience.
5 years of validation or debug experience with a BSEE or related degree (3 years with a Master's Degree) will also be considered.
Experience must also be inclusive of platform validation and / or debug experience.
Familiarity with debug tools (such as, but not limited to : protocol analyzers, exercisers, logic analyzers, O-scope, etc.)
Ability to work directly with external customers.
Ability to clearly communicate in Mandarin and English both written and verbal.
Intel Architecture and Server Platform experience.
Experience in microcontroller debug experience on CPU,PCH pre or post Silicon
Experience with Python.