Digital IC Design Verification Engineer
MediaTek
HsinChu, Taiwan
3天前

Job Description

Responsible for digital design verification of power management IC

1. Define verification plan

2. Create testbench and verify design functionality

3. Develop verification environment

4. Explore DV methodology

Requirement 1. MS in EE or CS

2. Experience in digital design or design verification

3. Expertise in PSL or SVA is a plus

4. Expertise in UVM is a plus

5. Perl / Python programming is a plus

6. Good debugging and analytical skill

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