Job Description
1. Security / crypto IP design
2. Processing unit IP design
3. DRAM Controller IP design
4. Digital IP RTL-to-Layout integration
5. Smart Phone platform design
6. Smart Phone SOC architecture Power Performance Analysis and Optimization
7. DFT / Testing architecture and plan
Requirement 1. Familiar with digital IC design and integration flow
2. Familiar with micro-controller or RISC design and integration flow
3.Better to have chip platform architecture design experience
4. Experience on DFT tools ( ex : DFT compiler, Tetramax, MBISTA, Tessent, ...) is a plus.
5. Experience in FPGA is a plus.
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